Daftar Blog Saya

Senin, 04 April 2011

Electrical handbook



Electrical ebook table of content as well as links to download:
Table of Contents:
  • Module 1 Introduction
    • Lesson 1 Introduction to Real Time Embedded Systems Part I [ Embedded (Embodiment) ~ Characteristics of an Rtes ~ Single-Functioned ~ Tightly Constrained ~ Reactive and Real Time ~ Common Architecture of Real Time Embedded Systems ]
    • Lesson 2 Introduction to Real Time Embedded Systems Part II [ Common Examples Of Embedded Systems ~ Mobile Phone ~ Components of an Embedded System ~ Microprocessor ~ Memory ~ Input Output Devices and Interfaces ~ Software ~ Design Issues ~ Design Metrics ~ NRE cost (nonrecurring engineering cost) ~ Unit cost ~ Size ~ Performance ~ Power Consumption ~ Flexibility ~ Time-to-prototype ~ Time-to-market ~ Maintainability ~ Correctness ~ The Performance Design Metric ~ Latency or response time ~ Throughput ~ Design Methodology (Fig. 2.4) ~ System level Design ~ Sub-system or Node Level design ~ Processor Level Design ~ Task Level Design]
    • Lesson 3 Embedded Systems Components Part I [ Structure of an Embedded System ~ Typical Example]
    • Lesson 4 Embedded Systems Components Part II [ Processors ~ General Purpose Processors ~ Microcontroller ~ Digital Signal Processor (DSP) ~ Microprocessors vs Microcontrollers ~ Input/Output Devices and Interface Chips ~ MODEMs (modulator, demodulator units) ~ CODECs (Compress and Decompress Units) ~ Filters ~ Controllers]
  • Module 2 Embedded Processors and Memory
    • Lesson 5 Memory-I [ Internal on-chip Memory ~ Primary Memory ~ Cache Memory ~ Secondary Memory ~ Volatile Memory ~ Non-volatile Memory ~ Data Storage ~ Memory access ~ Common Memory Types ~ Read Only Memory (ROM) ~ Implementation of Combinatorial Functions ~ Mask-programmed ROM ~ OTP ROM: One-time programmable ROM ~ EPROM: Erasable programmable ROM ~ EEPROM ~ Flash Memory ~ RAM: "Random-access" memory ~ Basic types of RAM ~ Ram variations ~ Example: HM6264 & 27C256 RAM/ROM devices ~ Example: TC55V2325FF-100 memory device]
    • Lesson 6 Memory-II [ Memory Hierarchy ~ Cache Mapping ~ Direct Mapping ~ Fully Associative Mapping ~ Set-Associative Mapping ~ Cache-Replacement Policy ~ Cache Write Techniques ~ Cache Impact on System Performance ~ Cache Performance Trade-Offs ~ Advanced RAM ~ Basic DRAM ~ Fast Page Mode DRAM (FPM DRAM) ~ Extended data out DRAM (EDO DRAM) ~ (S)ynchronous and Enhanced Synchronous (ES) DRAM ~ Rambus DRAM (RDRAM) ~ DRAM Integration Problem ~ Memory Management Unit (MMU) ~ EDO RAM ~ SDRAM]
    • Lesson 7 Digital Signal Processors [ FIR filter on (simple) General Purpose Processor ~ Let us see the program for an early DSP TMS32010 developed by Texas]
    • Lesson 8 General Purpose Processors – I [ A Typical Processor ~ The Architecture ~ Instruction Fetch Unit ~ Instruction Decode Unit ~ Branch Prediction ~ BHT Branch History Table and BTB Branch Target Buffer ~ Integer Unit ~ Data-Cache and Data Path ~ The L2-Cache Memory ~ FP, MMX and 3D]
    • Lesson 9 General Purpose Processors – II [ Multiplexed in Time (known as Time Division Multiplexing) ~ Signals of VIA Processor discussed earlier ~ Different Sleep states ~ Bus Transaction Control ~ Bus Arbitration Control ~ Interrupt Control ~ Processor Control]
    • Lesson 10 Embedded Processors – I [ The Architecture of a Typical Microcontroller ~ CPU Control ~ Register File ~ Register Arithmetic-logic Unit (RALU) ~ Code Execution ~ Instruction Format ~ Memory Interface Unit ~ Interrupt Service ~ Internal Timing ~ I/O Ports ~ Serial I/O (SIO) Port ~ Event Processor Array (EPA) and Timer/Counters ~ Pulse-width Modulator (PWM) ~ Frequency Generator ~ Waveform Generator ~ Analog-to-digital Converter ~ Watchdog Timer ~ Special Operating Modes ~ Reducing Power Consumption ~ Testing the Printed Circuit Board ~ Programming the Nonvolatile Memory]
    • Lesson 11 Embedded Processors – II [ The Signals of Intel Mcs 96 ~ Address and Data Pins ~ Bus Control and Status Signals ~ Processor Control Signals ~ Parallel Digital Input/Output Ports ~ Serial Digital Input/Output Ports ~ Analog Inputs ~ Some Specifications of the Processor]
    • Lesson 12 Memory-Interfacing [ External Memory Interfacing to PIC18F8XXX family of microcontrollers ~ Microcontroller Mode ~ Microprocessor Mode ~ Microprocessor with Boot Block mode ~ Extended Microcontroller Mode]
  • Module 3 Embedded Systems I/O
    • Lesson 13 Interfacing bus, Protocols, ISA bus etc. [ The Handshaking Protocol ~ Strobe Protocol ~ Handshake Protocol ~ The Strobe & Handshake combined ~ Handshaking Example in ISA Bus ~ ISA Signal Descriptions ~ SA19 to SA0 (SA for System Address) ~ LA23 to LA17 ~ AEN ~ BALE ~ CLK ~ SD15 to SD0 ~ DACK0 to DACK3 and DACK5 to DACK7 ~ DRQ0 to DRQ3 and DRQ5 to DRQ7 ~ I/O CH CK ~ I/O CH RDY ~ IOR ~ IOW ~ IRQ3 to IRQ7 and IRQ9 to IRQ12 and IRQ14 to IRQ15 ~ SMEMR ~ SMEMW ~ MEMR ~ MEMW ~ REFRESH ~ OSC ~ RESET DRV ~ TC ~ MASTER ~ MEM CS16 ~ I/O CS16 ~ 0WS ~ SBHE ~ The Memory Read bus cycle in ISA bus ~ The Memory Write bus cycle in ISA bus ~ I/O addressing ~ Interfacing an 8051 to external memory ~ EISA Bus ~ ISA Bus ~ PCI Bus ~ SCSI Bus ~ TURBOchannel Bus]
    • Lesson 14 Timers [ Counter ~ Timer in 8051 Microcontroller ~ Timer0 and Timer1 ~ MODE0 ~ The Programmable Interval Timer 8253 ~ 8253 Operating Modes ~ Mode 1 Programmable mono-shot ~ Mode 2 Programmable Rate Generator ~ Mode 3 Programmable Square Wave Rate Generator ~ Mode 4 Software Triggered Strobe ~ Mode 5 Hardware Triggered Strobe ~ Watchdog timer ~ Watchdog Circuit ~ Conclusion]
    • Lesson 15 Interrupts [ Types of Interrupts ~ PC-Program counter, P1-Port 1 P2-Port 2, μC-Microcontroller ~ Interrupts in a Typical Microcontroller (say 8051) ~ Interrupt Enables ~ Interrupt Priorities ~ The Bus Arbitration ~ Priority Arbiter ~ Daisy Chain Interrupts ~ Priority Resolver ~ Interrupt Mask Register (IMR) ~ Data Bus Buffer ~ Read/Write Control Logic ~ Software Interrupts]
    • Lesson 16 DMA [ DMA Controller ~ DMA Transfer Types and Modes ~ DMA Controller Operation ~ 8237 DMA Controller ~ Functional Description ~ DMA Operation]
    • Lesson 17 USB and IrDA [ The USB Port ~ Power and data ~ Data formats ~ IrDA Standard ]
    • Lesson 18 AD and DA Converters [ The DA Converter ~ The AD Converter ~ Quantizer ~ Coder ~ The Sampling Theorem ~ Methods of AD Conversion ~ Successive Approximation ADC ~ "Flash" Converter ~ Sigma-Delta AD converters ~ Over-sampling ~ Noise Shaping ~ Digital Filtering]
    • Lesson 19 Analog Interfacing [ Embedded AD Converters in Intel 80196 ~ EPA: Event Processor Array ~ PTS: Peripheral Transaction Server ~ Analog Mux: Analog Multiplexer ~ The associated Registers ~ AD_RESULT ~ A/D Converter Operation ~ The External AD Converters (AD0809) ~ Multiplexer ~ The Converter ~ Interface to a typical Processor ~ The DA Converter DAC0808]
  • Module 4 Design of Embedded Processors
    • Lesson 20 Field Programmable Gate Arrays and Applications [ Why do we need FPGAs? ~ Evaluation of FPGA ~ FPGA Structural Classification ~ Symmetrical arrays ~ Row based architecture ~ Hierarchical PLDs ~ FPGA Classification on user programmable switch technologies ~ SRAM Based ~ Antifuse Based ~ EEPROM Based ~ Logic Block and Routing Techniques ~ Xilinx Logic block ~ Altera Logic Block ~ FPGA Design Flow ~ System Design ~ Design Description ~ I/O integration with rest of the system ~ Synthesis ~ Design Verification ~ Hardware design and development ~ Things to Ponder]
    • Lesson 21 Introduction to Hardware Description Languages – I [ What is a HDL and where does Verilog come? ~ Hierarchy of design methodologies ~ Bottom-Up Design ~ Top-Down Design ~ Hierarchical design concept and Verilog ~ Behavioral or algorithmic Level ~ Register-Transfer Level ~ Gate Level ~ Switch Level ~ Instances ~ The Design Flow ~ High Level Design ~ Micro Design/Low level design ~ RTL Coding ~ Synthesis ~ Place & Route ~ Post Silicon Validation ~ Verilog HDL: Syntax and Semantics ~ Lexical Conventions ~ Gate Level Modeling ~ Gate-level multiplexer ~ Blocking and Nonblocking assignment ~ The Case Statement ~ Looping Statements ~ Switch level modeling ~ CMOS switches ~ Bidirectional switches ~ Instantiation ~ Delay specification of switches ~ An Instance: Verilog code for a NOR- gate ~ Some Exercises ~ Gate level modelling ~ Behavioral modelling]
    • Lesson 22 Introduction to Hardware Description Languages – II [ Task and Function ~ Task ~ Automatic (Re-entrant) Tasks ~ Automatic (Recursive) Function ~ Constant function ~ Signed function ~ System tasks and functions ~ $display, $strobe, $monitor ~ $time, $stime, $realtime ~ $reset, $stop, $finish ~ $scope, $showscope ~ $random ~ $dumpfile, $dumpvar, $dumpon, $dumpoff, $dumpall ~ $fopen, $fdisplay, $fstrobe $fmonitor and $fwrite ~ Writing Testbenches ~ Testbenches ~ Test Plan ~ Test Cases ~ Creating testbenches ~ Test Bench with Clock generator ~ Adding the Reset Logic ~ Code for the reset logic ~ Adding test case logic ~ Adding compare Logic ~ User Defined Primitives ~ Combinational UDPs ~ TestBench to Check the above UDP ~ Sequential UDPs]
    • Lesson 23 Introduction to Hardware Description Languages-III [ Programming Language interface ~ Verilog ~ How it Works? ~ C Code ~ Verilog Code ~ Running a Simulation ~ PLI Application Specification ~ Calling the C function ~ Access Routines ~ Program Flow using access routines ~ Utility Routines ~ Verilog and Synthesis ~ What is logic synthesis? ~ Impact of automation on Logic synthesis ~ Example of a Non-Synthesizable Verilog construct ~ Constructs and Their Description ~ Operators and Their Description ~ Constructs Supported In Synthesis ~ Overall Logic Circuit Modeling and Synthesis in brief ~ Combinational Circuit modeling using assign ~ Translation ~ Logic optimization ~ Technology library ~ Design constraints ~ Logic synthesis ~ Verification of the gate "level netlist ~ Functional verification ~ Verification ~ Traditional verification flow ~ Functional verification ~ Functional verification Environment ~ Formal Verification ~ Semi- formal verification ~ Equivalence checking]
    • Lesson 24 Parallel Data Communication [ The IEEE 488 (GPIB, HPIB) Standard]
    • Lesson 25 Serial Data Communication [ Any data communication standard comprises ~ What is Serial Communication? ~ Asynchronous Communication and Standards ~ Interface Specifications for Asynchronous Serial Data Communication ~ THE RS-232 ~ Maximum Bit Transfer Rate, Signal Voltages and Cable Length ~ Signal States and the Communication Technique ~ Transition or Dead Area ~ The communication technique ~ RS-422 and RS-423 (EIA Recommended Standard 422 and 423) ~ RS-485 ~ Interfacing of Peripherals Involving the Rs-232 Asynchronous Communication Standards ~ The RTS and CTS Pins ~ The DTR and DSR Pins ~ The CD and RI Pins ~ A Practical Example: PC-PC Communication ~ 4-20 mA current loop]
  • Module 5 Embedded Communications
    • Lesson 26 Network Communication [ The I2C (Inter-Integrated Circuit) Bus Standard ~ The Field Bus ~ The Physical layer ~ Communication stack ~ User Layer ~ Device descriptions ~ The CAN Bus ~ CAN Versions ~ CAN Standards ~ The Can Protocol/Message Formats ~ BASIC CAN Controller]
    • Lesson 27 Wireless Communication [ WLANs-IEEE 802.11X ~ WPANs-802.15X ~ Ricochet ~ Services ~ HomeRF ~ HiperLAN ~ Bluetooth & Infrared communication ~ INFRARED WIRELESS COMMUNICATION and BLUETOOTH ~ Bluetooth Communication Topology ~ The Piconet ~ The Scatternet ~ Bluetooth Core Protocols ~ Operational States]
  • Module 6 Embedded System Software
    • Lesson 28 Introduction to Real-Time Systems [ What is Real-Time? ~ Applications of Real-Time Systems ~ Industrial Applications ~ Medical ~ Peripheral equipments ~ Automotive and Transportation ~ Telecommunication Applications ~ Aerospace ~ Internet and Multimedia Applications ~ Consumer Electronics ~ Defense Applications ~ Miscellaneous Applications ~ A Basic Model of a Real-Time System ~ Characteristics of Real-Time Systems ~ Safety and Reliability ~ How to Achieve High Reliability? ~ Software Fault-Tolerance Techniques ~ Types of Real-Time Tasks ~ Hard Real-Time Tasks ~ Firm Real-Time Tasks ~ Soft Real-Time Tasks ~ Non-Real-Time Tasks]
    • Lesson 29 Real-Time Task Scheduling ” Part 1 [ Real-Time Task Scheduling ~ Basic Terminologies ~ Types of Real-Time Tasks ~ A Few Basic Concepts ~ Classification of Real-Time Task Scheduling Algorithms ~ Clock-Driven Scheduling ~ Table-Driven Scheduling ~ Theorem 1 ~ Cyclic Schedulers ~ Theorem 2]
    • Lesson 30 Real-Time Task Scheduling ” Part 2 [ Event-driven Scheduling " An Introduction ~ Types of Event Driven Schedulers ~ Foreground-Background Scheduler ~ Earliest Deadline First (EDF) Scheduling ~ Is EDF Really a Dynamic Priority Scheduling Algorithm? ~ Implementation of EDF ~ Shortcomings of EDF ~ Rate Monotonic Algorithm(RMA) ~ Schedulability Test for RMA ~ Necessary Condition ~ Sufficient Condition ~ Achievable CPU Utilization ~ Advantages and Disadvantages of RMA ~ Deadline Monotonic Algorithm (DMA) ~ Context Switching Overhead ~ Self Suspension ~ Self Suspension with Context Switching Overhead]
    • Lesson 31 Concepts in Real-Time Operating Systems [ Time Services ~ Clock Interrupt Processing ~ Providing High Clock Resolution ~ Features of a Real-Time Operating System ~ Unix as a Real-Time Operating System ~ Non-Preemptive Kernel ~ Dynamic Priority Levels ~ Other Deficiencies of Unix ~ Unix-based Real-Time Operating Systems ~ Extensions To The Traditional Unix Kernel ~ Host-Target Approach ~ Preemption Point Approach ~ Self-Host Systems ~ Windows As A Real-Time Operating System ~ Features of Windows NT ~ Shortcomings of Windows NT ~ Windows vs Unix]
    • Lesson 32 Commercial Real-Time Operating Systems [ POSIX ~ Open Software ~ Genesis of POSIX ~ Overview of POSIX ~ Real-Time POSIX Standard ~ A Survey of Contemporary Real-Time Operating Systems ~ PSOS ~ VRTX ~ VxWorks ~ QNX ~ μC/OS-II ~ RT Linux ~ Lynx ~ Windows CE]
  • Module 7 Software Engineering Issues
    • Lesson 33 Introduction to Software Engineering [ Evolution of Program Design Techniques ~ Structured Programming ~ Features of Structured Programming ~ Advantages of Structured Programming ~ Data Structure-Oriented Design ~ Data Flow-Oriented Design ~ Object-Oriented Design ~ Changes in Software Development Practices ~ Software Life Cycle Model ~ Classical Waterfall Model ~ Feasibility Study ~ Requirements Analysis and Specification]
    • Lesson 34 Requirements Analysis and Specification [ Requirements Gathering And Analysis ~ SRS Document ~ Properties of a Good SRS Document ~ Problems without a SRS Document ~ Identify Non-Functional Requirements ~ Problems with An Unstructured Specification ~ Techniques for Representing Complex Logic ~ Model-Oriented Vs. Property-Oriented Approach ~ Merits of Formal Requirements Specification ~ Steps to Develop an Axiomatic Specification ~ Representation of Algebraic Specification ~ Executable Specification Language (4GL)]
    • Lesson 35 Modelling Timing Constraints [ Timing Constraints An Introduction ~ Classification of Timing Constraints ~ Delay Constraints ~ Deadline Constraints ~ Duration Constraints ~ Examples of Different Types of Timing Constraints ~ Modelling Timing Constraints ~ The Finite State Machine (FSM) ~ Extended Finite State Machine (EFSM) ~ Stimulus-Stimulus (SS) ~ Response-Stimulus (RS) ~ Stimulus Response (SR) ~ Response Response (RR) ~ Delay Constraint ~ Durational Constraint]
    • Lesson 36 Software Design “Part 1 [ Characteristics of a Good Software Design ~ Current Design Approaches ~ Coupling ~ Functional Independence ~ Function-Oriented Design Approach ~ Object-Oriented Design Approach ~ Function-Oriented Vs. Object-Oriented Design ~ Function-Oriented Software Design ~ Structured Analysis ~ Data Flow Diagrams ~ Data Dictionary ~ DFD : Levels and Model ~ Balancing DFDs ~ Context Diagram ~ Developing the DFD Model ~ Common Errors in Constructing DFD Model ~ Shortcomings of a DFD Model ~ Extending DFD Technique To Real-Time Systems ~ Transformation of a DFD into a Structure Chart]
    • Lesson 37 Software Design Part 2 [ Object-Oriented Concepts An Introduction ~ Basic Entities ~ Data Abstraction ~ Advantages of Data Abstraction ~ Inheritance ~ Object-Oriented Vs. Object-Based Languages ~ Multiple Inheritance ~ Advantages Of Encapsulation ~ Static Dynamic Binding ~ Object Modelling using UML ~ Factoring of Commonality Among Use Cases ~ Aggregation ~ Interaction Diagrams ~ Sequence Diagrams ~ Collaboration Diagrams ~ State Chart Diagrams ~ Object-Oriented Software Development ~ Design Patterns ~ Design Pattern Solutions ~ The design pattern solutions are typically ~ Creator Pattern ~ Domain Modelling ~ Boundary objects ~ Booch's Object Identification Method ~ An Example: Tic-Tac-Toe]
  • Module 8 Testing of Embedded System
    • Lesson 38 Testing Embedded Systems [ Faults in Embedded Systems ~ Hardware Fault Model (Gate Level Fault Models) ~ Software-Hardware Covalidation Fault Model ~ Textual Fault Models ~ Control-Dataflow Fault Models ~ State Machine Fault Models ~ Testing of Embedded Core-Based System-on-Chips (SOCs) ~ Test Pattern Source and Sink ~ Core Test Wrapper ~ Non-concurrent testing ~ ATPG for Hardware-Software Covalidation ~ Interaction Testing Technique between Hardware and Software in Embedded Systems]
    • Lesson 39 Design for Testability [ Design for Testability Techniques ~ Ad-hoc DFT methods ~ Scan Design Approaches for DFT ~ Scan Variations ~ MUX Scans ~ Level-Sensitive Scan Design (LSSD) ~ Random Access Scan ~ Scan-Hold Flip-Flop]
    • Lesson 40 Built-In-Self-Test (BIST) for Embedded Systems [ BIST Test Pattern Generation Techniques ~ Pseudo-exhaustive patterns ~ Pseudo-Random Pattern Generation ~ Weighted Pseudo-random Pattern Generation ~ Cellular Automata for Pattern Generation ~ Comparison of Test Generation Strategies ~ BIST Response Compression/Compaction Techniques ~ Syndrome Testing ~ LFSR Structure ~ LFSR for Response Compaction: Signature Analysis ~ Multiple-Input Signature Register (MISR) ~ Logic BIST Architecture ~ Built-in Logic Block Observer (BILBO) ~ BILBO Usage for multi-CUT structure ~ Self-Testing Using MISR and Parallel Shift register sequence generator (STUMP) ~ BIST for Structured Circuits ~ Exhaustive Test in the Intel 80386 ~ Pseudorandom Test in the IBM RISC/6000 ~ Embedded Cache Memories BIST of MC68060 ~ ALU Based Programmable MISR of MC68HC11]
    • Lesson 41 Boundary Scan Methods and Standards [ TAP Controller ~ Bypass and Identification Registers ~ On Board Test Controller ~ How Boundary Scan Testing Is Done ~ Simple Board Level Test Sequence ~ Boundary Scan Description Language ~ Benefits and Penalties of Boundary Scan]
    • Lesson 42 On-line Testing of Embedded Systems [ Electronic Controller Electro Hydraulic system ~ Interconnect test of the interconnecting buses (BIST) ~ Parametric test of the interconnecting buses (BIST) ~ Internal test of the cores (Concurrent tests)]
This ebook is available FREE at National Programme on Technology Enhanced Learning Indian Institute of Technology Madras, India website, we merely collect the information, we are neither affiliated with the author(s), the website and any brand nor responsible for its content and change of content. (Read our disclaimer here or here before you download the document from the website written above by clicking the below link).

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Table of Contents:
  • Module 1 Illumination Engineering Basics
    • Lesson 1 Introduction, objectives: State the need for Illumination, Define good Illumination, State what comprises an electric utility? List standard voltage levels, State need for high voltages for transmission [ Fundamentals of a.c Generation ~ Single Phase AC Generation ~ Generation of 3 phase E.m.f ]
    • Lesson 2 Radiation, objectives: State the Visible Range of light, State the range of light human eye responds to, Define UV radiation, Define IR radiation, List the physical phenomenon employed in artificial lighting, Define color temperature [ Relative Energy ~Relative Luminosity ~Spectral Energy ~Physical Processes Employed in the artificial sources ~Color Temperature ~ Wien displacement law ]
    • Lesson 3 Eye and Vision – I, objectives: Identify similarity between eye and camera, List the nerve system responsible for adaptation of eye, List factors responsible for visual acuity, State the purpose of good lighting, Define glare, Define Purkinjee effect [ Luminosity of Eye ]
    • Lesson 4 Eye and Vision – II, objectives: What is visual acuity? List qualitative factors responsible for visual acuity, State how the acuity varies with other parameters, State Minimum Illumination requirement for good visibility, Define Chromatic aberration [ Visual Activity Vs Illumination ~ Contrast Sensivity Vs Illumination ~ Nervous Muscular Tevlion Vs Illumination ~ Frequency of Blinking Vs Illumination ~ Convergence rate Vs Illumination ]
    • Lesson 5 Laws of Illumination, objectives: Define Standard of Illumination? What is a Candela? Understand MSLI, State Freschner’s Law, State Inverse Square law of Illumination [ Transparent ~ Frechner's law ~ Inverse Square Law ~ Lambert's Cosine Law of Incidence ]
    • Lesson 6 Photometry, objectives: Understand photometric bench, What is an Illumination Meter, Understand Light Distribution Curves, What is a Rousseau Diagram, Understand a Luminaire [ Photometric Bench ~ Luminaire ]
  • Module 2 Lamps
    • Lesson 7 Incandescent Lamps, objectives: What are Incandescent Lamps? State the Components of an Incandescent Lamp, Understand need for inert Gas in Incandescent Lamp, What is Lamp Darkening? State Factors responsible for Performance of an Incandescent Lamps
    • Lesson 8 Discharge Lamps I, objectives: What are Discharge Lamps? State Various type of Discharge Lamps. List Types of Emission that make a Gas Conducting, Distinguish Line and Band Spectrum [ Electron Emission ~ Mercury Vapor Lamp ~ Sodium Vapor Lamp ]
    • Lesson 9 Discharge Lamp II, objectives: List various Discharge Lamps, State Utilization Factor for a Discharge Lamp, What is color rendering, Understand Working of a Fluorescent Lamp, State various types of Phosphors usable [ Discharge Lamps ~ Fluorescent Lamp ]
    • Lesson 10 Discharge Lamp III, objectives: How are Fluorescent Lamps specified, Understand how every watt of Power is spent in a fluorescent lamp, State Various applications of UV Light, What are CFLs? How do CFLs compare with Ordinary Lamps? [ Discharge Lamps (contd.) ~ Bulb Temperature Vs Light output ~ Relative Efficiency of 1.5" Diameter Lamp ~ Lumen Maintenance Curve ~ Fluorescent Lamp Mortality Curve ~ Lecture Summary ]
  • Module 3 Illumination Systems, Objectives: List Components of an Illumination System, What is a Luminnaire?, What are various forms of Lighting?
    • Lesson 11 Illumination Systems I [ Luminaries ~ Industrial Luminaries ~ Categories of Explosive Areas ~ Road Lighting ~ Flood Lights ]
    • Lesson 12 Illumination Systems II, objectives: Understand the accessories employed in Illuminating systems, What is a Ballast? List various types of Ballast, List starting devices.
    • Lesson 13 Glare, objectives: Define Glare, List types of Glare, List the effects of Glare, What are various Glare Indices, How is Glare Evaluated? List measures to reduce the Glare [ Glare Evaluation ]
    • Lesson 14 Color, objectives: What are Primary colors? How is color specified? What is CRI? [ Color Specification Systems ~ Munsell system ~CIE System ~ L *a *b Colors Space ~ Color Rendering: Index Ra ]
  • Module 4 Lighting Application
    • Lesson 15 Interior Lighting, objectives: List the factors responsible for interior lighting, State recommended requirements for Good Lighting, List Factors governing light output. State Maintenance procedures for proper interior lighting, Enumerate recommended Illuminance levels [ Interior Lighting ~ Trends ~ Interior Finish ]
    • Lesson 16 Sports Lighting, objectives: List the factors responsible for sport lighting? List the categories of users concerned with sport lighting, State the grouping of games according to CIE [ Sports Lighting ~ Vertical Illuminance ~ Illuminance Uniformity ~ Glare ~ Modeling and Shadows ~ Color Appearance and Color Rendering ~ Recommendations for TV (National) ~ Recommendations for TV (International) ~ Recommendations for HDTV ~ Metal Halide Lamps ]
    • Lesson 17 Road Lighting, objectives: List factors affecting Road lighting scheme, State the conditions provided by Road lighting, List the categories of Road and recommended light levels, Understand zones in a tunnel lighting, What are Post Top Lanterns? [ Luminance Level ~ Luminance Uniformity ~ Glare Limitation ~ Lamp Spectra ~ Visual Guidance ~ Official Recommendations ~ Road categories ~ Recommendations for lighting ~Lighting Arrangements ~ Road Junctions ~Tunnel lighting]
    • Lesson 18 Lighting Calculations, objectives: List the issues for Lighting Calculations, Learn the quick way of estimating recommended levels, Understand the use of Iso-lux diagrams, List the factors to be accounted for calculation, What is room index [ Lighting Calculations ~ Horizontal Illuminance ~ Reflectance code ~ Vertical Illuminance ]
    • Lesson 19 Lighting Applications, objectives: List various lighting applications, Understand the need to integrate lighting with other applications, Classify Industrial Lighting, Classify Office Lighting, List requirements of lighting for Educational Institutions, Auditoria, Hospitals, Hotels and restaurants [ Lightning Applications ~ Multistorey ~ Single storey with skylight ~ Special Tasks in Industrial Environment ~ Office lighting ~ Illuminance ~ Luminances ~ General offices ~ Shops and Stores ~ Hotels / Restaurants ~ Hospitals ]
    • Lesson 20 Conclusions on Illumination Engineering [ Radiation ~ Eyes & Vision ~ Laws of Illumination ~ Photometry ~ Incandescent Lamps ~ Discharge Lamps I ~ Illumination Systems I ~ Glare ~ Color ~ Interior Lighting ~ Sports Lighting ~ Road Lighting ~ Lighting Calculations ~ Lighting Application ]
This ebook is available FREE at National Programme on Technology Enhanced Learning Indian Institute of Technology Madras, India website, we merely collect the information, we are neither affiliated with the author(s), the website and any brand nor responsible for its content and change of content. (Read our disclaimer here or here before you download the document from the website written above by clicking the below link).
DOWNLOAD LINKS: